!!!先進封裝技術開發工程師/副理/經理

1. Conducting quality check procedures to ensure high-quality deliverables.​ 

2. Coordinating product quality issue to provide best-fit disposition for quality event impact material.​ 

3. Ensure lessons learned from prior projects are used to improve quality management process.​ 

4. Customer quality communication and RMA/FA management.

1. IC封裝/晶圓凸塊技術開發與管理  

2. 與封裝廠合作完成規劃之技術開發  

3. 先進封裝技術開發,品質驗證與生產良率管理  

4. 定期與不定期執行bumping/fan-out/WLCSP廠品質稽核

1. 先進製程技術製程開發  

2. 先進封裝技術開發

Develop advanced package technologies for MediaTek‘s HPC business

1. 新產品風險評估及擬定封裝顆粒&板級可靠度驗證計畫 

2. 驗證失效品之電性及物性分析 

3. 客戶新產品可靠度問題諮詢 

4. 新封裝供應商稽核及認證 

5. 封裝供應商品質及可靠度管理 (品質異常事件處理, 變更管理, 例行性稽核, 評比等) 

6. 新產品及技術導入品質及可靠度管理 

7. 封裝供應商品質改善專案

1. Develop systematic methodology to alleviate design challenges, including FIP development, synthesis, DFT, physical implementation, sign-off, process what-if assessment, system performance evaluation, in advanced nodes or package.  

2. Closely work with foundry and EDA vendors to define innovative HPC, Chiplet design methodologies. 

3. Explore new circuit architecture, EDA features and define improvement direction from MTK product requirements.

• 新產品導入量產 (IC 封裝部分) 

• 良率持續改善 

• 解決製程異常, 工程問題 

• 技術開發與製程改善

1. DFT architecture exploration & evaluation for next-gen process node & package technology of MediaTek: 

* Scan chain insertion & ATPG pattern generation 

* Pattern validation through simulation & silicon analysis(pass/fail, shmoo, fail log, etc.) 

* Diagnosis to help manufacture process improvement 

2. Co-work with SoC architect, RTL designer, physical design engineer, and package engineer to define best architecture for 3D-IC: 

* PPA(Performance/Power/Area) impact analysis & mitigation via DFT innovation 

* Develop & integrate DFT-related RTL design modules to test chip

負責新產品開發、產品製造管理、良率改善，及產品開發時的問題分析及解決。