職缺描述
DRAM IC circuit design: 1. Digital logic, Mixed Signal design , Verilog,Hspice 2. 需理解數位邏輯及CMOS元件動作, 可建立電路及模擬驗證 3. 對 Array structure & memory periphery control 有經驗佳 4. 對 High speed S2P/P2S, DLL clock de-skew, DCC 有經驗佳 5. 對 Design For Testing (DFT) 及BIST有經驗佳 6. 具備良好團隊合作精神及溝通能力, 主動且積極學習態度 Digital IC function part: 1. build up verilog testbench 2. fullchip verilog simulation/verification 3. verilog behavior models creation 4. pattern pool coverage raising up
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