類比射頻積體電路佈局設計工程師

高速類比SerDes電路全客製化佈局設計及自動化流程設計 

Fully custom layout design for analog high-speed SerDes circuit and layout automation flow development.

28nm及以下先進製程(含FinFET) IO電路和ESD防護設計, 工作內容包含  

(1) GPIO電路設計(包含ESD/LU防護) 

(2) 特殊應用IO (SD3.0/SIM card/eMMC等)電路設計(包含ESD/L防護)  

(3) 高速IO和特殊應用IO在事業部專案上展開和執行 

- Advance node (28nm and beyond, including FetFET) IO circuitry and ESD protection design covering fields for  

(a) General purpose IO circuit design (with ESD/LU protection)  

(b) Specialty IO (SD3.0/SIM card/eMMC etc.) circuit design (with ESD/LU protection)  

(c) Project related implementation for high speed/specialty IO Interface - High speed IO, specialty IO circuit design, ESD protection circuit design and simulation.  

Work with project leader, layout, packaging and system engineers to meet design and system specifications.  

Work with IO library modeling, characterization teams closely for IP release.