Data analysis & AI solution engineer for advance process nodes

1. 2.5D/3.5D package technology development​ 

2. SoC/Memory heterogeneous integration package development​ 

3. Package technology integration, NPI and MP​ 

4. Project management​

1. Automotive Packaging development, New product introduction, Mass production, Supplier management.​ 

2. Develop and evaluate the advanced IC Package technology.​ 

3. Collaborate with the assembly subcontractors to complete the technology development.​ 

4. Qualification and yield improvement for the advanced IC Packages.​ 

5. Audit subcontractors.

1. IC封裝/晶圓凸塊技術開發與管理  

2. 與封裝廠合作完成規劃之技術開發  

3. 先進封裝技術開發,品質驗證與生產良率管理  

4. 定期與不定期執行bumping/fan-out/WLCSP廠品質稽核

1. Conducting quality check procedures to ensure high-quality deliverables.​ 

2. Coordinating product quality issue to provide best-fit disposition for quality event impact material.​ 

3. Ensure lessons learned from prior projects are used to improve quality management process.​ 

4. Customer quality communication and RMA/FA management.

1. 先進製程技術製程開發  

2. 先進封裝技術開發

• 新產品導入量產 (IC 封裝部分) 

• 良率持續改善 

• 解決製程異常, 工程問題 

• 技術開發與製程改善

先進封裝技術開發 

1. 先進新產品導入技術開發 (新產片試產規劃, DRC/DRM檢驗, DOE及良率改善規劃, 量產區間及良率分析)  

2. 熟悉先進chiplet及3DIC封裝技術開發 

3. 晶圓級與面板級先進封裝結構設計

1. DFT architecture exploration & evaluation for next-gen process node & package technology of MediaTek: 

* Scan chain insertion & ATPG pattern generation 

* Pattern validation through simulation & silicon analysis(pass/fail, shmoo, fail log, etc.) 

* Diagnosis to help manufacture process improvement 

2. Co-work with SoC architect, RTL designer, physical design engineer, and package engineer to define best architecture for 3D-IC: 

* PPA(Performance/Power/Area) impact analysis & mitigation via DFT innovation 

* Develop & integrate DFT-related RTL design modules to test chip

負責新產品開發、產品製造管理、良率改善，及產品開發時的問題分析及解決。