軟體工程師(Compiler)

工作項目： 

韌體撰寫及解決客戶問題  

應徵條件： 

1. 碩士以上;電機工程、電信工程、電控工程、電子工程、資訊工程、資訊科學、動力機械、自動控制、通訊工程相關科系畢業為主 

2. 熟悉 C語言 

3. 熟悉 Orcad

工作項目： 

1. 開發FTL與客戶客製化需求。 

2. 支援新NAND開發。 

3. 支援客戶量產問題。 

應徵條件： 

1. 碩士以上; 電機工程、電子工程、資訊工程相關科系畢業為主。

工作項目： 

1. 晶片功能開發、系統驗證及量產。 

2. 客戶技術支援。 

應徵條件： 

1. 碩士以上; 電機工程、電信工程、電控工程、電子工程、資訊工程、資訊科學、動力機械、自動控制、通訊工程相關科系畢業為主。 

2. 具1~4年以上相關經驗。 

3. 熟8051及C語言韌體開發，具相關經驗尤佳。 

4. 熟影像傳輸介面(HDMI/DisplayPor…)相關規格及有相關工作經驗。 

5. 熟TV/Monitor相關系統架構及有相關經驗者。 

6. 熟USB Type-C 相關規格開發者。 

7. 具備處理SI/PI及PCB設計開發經驗者。

工作項目： 

1. RF CP/FT測試程式開發及維護。 

2. 產品良率的改善。 

3. RF Probe card,Load board電路設計。 

4. 測試電路Debug. 

5. 須配合國內外出差。 

應徵條件： 

1. 學士以上; 電機工程、電信工程、電控工程、電子工程、資訊工程、資訊科學、通訊工程相關科系畢業為主。 

2. 熟悉 C語言或VB. 

3. 熟悉 V50/J750/Uflex操作。 

4. 具RF測試背景者為佳。

工作項目： 

1.支援客戶由開發至量產所遇到的各種WiFi相關軟、硬體問題。 

2.處理客戶回報的問題 ，分析與歸類後並與內部相關RD合作解決問題。 

3.執行/製作 Debug SOP並協助客戶或代理商解決問題。  

4.  

SW: 

移植，整合，與客製化WiFi 軟體功能到客戶的平台 

HW:  

review電路圖 

RF相關量測 

interface (PCIE/USB/SDIO) signal量測 

應徵條件： 

1.3~6年以上軟體或硬體技術開發/支援相關工作經驗. 

2.直接支援客戶處理問題經驗 

3.具有同時處理多個案子/客戶的能力 

4.能配合加班或出差(世界各地) 

5.具跨部門 (PM/Sales/RD)、背景(SW\HW)溝通協調能力與經驗. 

6.具系統整合能力與相關經驗者為佳 

(MD1750007)

Key qualifications: 

1. MS degree or above with EE or CS background 

2. Familiar with SystemVerilog and Verilog 

3. Exposure to OVM/UVM/VMM methodology 

4. Exposure to constrained-random based verification environment 

5. Exposure to create coverage model and drive coverage closure in including code/functional coverage. 

6. Be able to develop a test bench from scratch 

7. Hands on working experience on unit/block/full-chip level verification 

8. Good communication skill 

9. Leadership/management experience is a plus. 

Job descriptions: 

1. Plan the verification strategy for SOC projects 

2. Hands-on verification task of some of the units 

3. Work closely with the design teams. 

4. Drive the verification team, problem-solving on day-to-day works 

5. Provide the measurable metrics for project leads and upper management. 

6. Bug/coverage trend identification. Foresee the possible issues and plan for them. 

(MD17C0031)

Key qualifications: 

1. Master degree or above with EE or CS background 

2. Familiar with SystemVerilog and Verilog 

3. Exposure to OVM/UVM/VMM methodology 

4. Exposure to constrained-random based verification environment 

5. Exposure to create coverage model and drive coverage closure in including code/functional coverage. 

6. Be able to develop a test bench from scratch 

Preferred qualifications:  

1. Familiar with PCI/USB/SATA/Serdes 

2. Familiar with Bluetooth 

3. Familiar with SOC bus fabric and AXI/AHB/OCP bus protocols 

4. Familiar DDR2/3/4 

5. Familiar with any type of flash memory 

6. Familiar SVA 

7. Familiar Formal verification methodology 

8. Experience of writing bootloader for ARM/MIPS CPUs 

9. Perl/Python experience 

Job descriptions: 

1. Test plan creation 

2. Develop testbench, test cases, reference model, coverage model and regression suite 

3. Run RTL and gate level simulation, debug failures, manage bug tracking 

4. Drive and achieve coverage closure 

(MD17C0031)

工作項目： 

負責下列工作之一 

1. SoC 平台開發及產品線支援。 

2. 微處理器開發。 

3. 低功耗軟體平台開發。 

應徵條件： 

1. 碩士以上；電機、資訊科學、資訊工程、電子相關科系畢業為主。 

2. 熟悉 Verilog RTL及Synthesis, Simulation, Verification 等相關 IC Design Flow. 

3. 熟悉 Computer Architecture 

4. 具下列經驗者尤佳: 

(1) On-chip Bus, DDR/Flash Memory Controller, PCIE, USB等設計 

(2) Embedded system軟體開發 

(3) ARM CPU 與 ARM/Imagination GPU 整合 

(MD1430014)

1.Writing behavioral model 

2.Responsible for functional verification

Joining in specification definition, designing verification platform, developing behavioral models, and responsible for system and functional verification

工作項目： 

DSP/Audio演算法開發、維護及優化。 

應徵條件： 

1. Bachelor‘s degree in EE/CS or similar. 

2. Familiar with coding and optimization skills in C, C++, and assembly. 

3. Experience in DSP SIMD programming. 

4. Preferred Qualifications. 

(1) Experience in embedded system signal processing optimization, any of the following: Tensilica HiFi, CEVA, DSP, … etc. 

(2) Solid understanding and product experienceon on audio signal and audio codec processing and optimization. 

(3) Fundamental machine learning / deep learning knowledge.

工作項目： 

DevOps、CI/CD 軟體開發及維運。 

應徵條件： 

1. Bachelor‘s degree in EE/CS or similar. 

2. Familiar with Linux environment and Python programming language. 

3. Familiar with Gerrit and Jenkins. 

4. Familiar with SDLC, SSDLC, DevOps, DevSecOpts, CI/CD. 

5. Preferred Qualifications: 

(1) Experience in DevOps tool usage, maintain, or management. 

(2) Experience in SQA, SSA. 

(3) Good communication skill and trouble-shooting ability.

Verification for microprocessor designs. Desired skills and experience includes: 

1. Experience in processor design verification: test planning, testbench development, and documentation 

2. Knowledge of assembly language, C/C++ and/or SystemVerilog 

3. Knowledge of SVA or UVM methodology for block and top level verification 

4. Formal property checking/formal verification methodologies 

5. Proficiency in scripting languages such as Python/Perl 

應徵條件： 

1. 碩士以上; 電子、電機、資工、電信、電控、資科等相關科系畢業為主。 

2. 具相關工作經驗者尤佳。

工作項目： 

1. 影像處理。 

2. Machine Learning演算法發展。 

應徵條件： 

1. 碩士以上; 電機工程、電信工程、電控工程、電子工程、資訊工程、資訊科學、動力機械、自動控制、通訊工程相關科系畢業為主。 

2. 熟悉 Machine Learning/DNN model development為佳。

大學以上，電機、資訊相關系所畢，具下列任一條件者佳： 

(1)熟C、C++、Assembly、Linux。 

(2)具網路embedded system開發經驗。 

(3)對網路如Ethernet, TCP/IP, NAT, QoS, Network processor/protocols/Architecture有興趣者。 

(4)對網路產品，程式設計有興趣者。

研究所以上，電子、電機、資工、相關科系畢業, 或相關工作3年以上經驗者,具下列任一條件者佳: 

(1) 具有 TV 色彩工程經驗.  

(2) 具有視訊處理相關演算法經驗或濃厚興趣者 

(3) 熟色彩調整校正, 色域轉換等色彩處理經驗者 

(4) 熟 DSP 與影像處理者

1.Frame佈局與生成 

2.Tapeout資料與文件準備 

3.文件庫維護