運算系統架構工程師 (功耗最佳化)

1. Develop systematic methodology to alleviate design challenges, including FIP development, synthesis, DFT, physical implementation, sign-off, process what-if assessment, system performance evaluation, in advanced nodes or package.  

2. Closely work with foundry and EDA vendors to define innovative HPC, Chiplet design methodologies. 

3. Explore new circuit architecture, EDA features and define improvement direction from MTK product requirements.

1. Baseband algorithm development. 

2. Ethernet PHY system architecture and algorithm design.  

3. Communication system verification.  

4. Architecture/algorithm design for low-power and high-speed communication system.  

5. Digital signal processing of mixed-signal system.

1. 開發, 優化與維護 4G/5G Modem 自動化整合測試平台, CI Flow 等. 

2. 開發, 優化與維護 4G/5G Modem Simulator  

3. 開發, 優化與維護 4G/5G Modem 研發流程與驗證平台的 Tool Chain

* Define and optimize SOC hardware architecture and associated software flows in aspects of system performance/power/area to improve MediaTek‘s product competitiveness. 

* Develop simulation and analysis platforms for performance/power/area analysis. 

* Work Loction : HsinChu, Taipei