車用運算系統架構工程師

We are seeking a highly skilled DFT/DFM Engineer to join our automotive ADAS SoC chip design team.  

The successful candidate will be responsible for DFT and DFM methodologies, design, and implementation for our advanced automotive system-on-chip (SoC) designs.  

The candidate will also collaborate with the design and layout teams to integrate DFT/DFM requirements. 

• SoC testing architecture design  

• Support project NPI(new product introduction) to MP(mass production) (test program development, coverage enhancement, yield improvement, cost reduction) 

• Cowork w/ IP, test engineer, process team, board design to fulfill CP/FT/SLT test requirement.

1. Smartphone (Low Power Architect) and Automotive (Power control) 

2. Not a management position 

3. Short term:digital IP design/integration of power control IPs with zero bugs  

Long term:define power control arch for smartphone or automotive products 

develop new tech for power control

1. Develop and implement tailored DRAM controller/PHY solutions for automotive applications. Validate functionality, improve design revisions and meet performance targets as well as system requirements. 

2. Perform rigorous design testing and debugging in automotive environments. Troubleshoot and propose solutions for any issues occurring in post-silicon validation. 

3. System Level Cache Design & Implementation: Design and implement system level cache strategies to optimize performance and efficiency across our product range. 

4. System-Level Understanding: Exhibit a system-level understanding of performance trade-offs, system architecture, memory subsystems, and various memory technologies (DDR3, DDR4, DDR5, LPDDR3, LPDDR4, LPDDR5 etc.). 

5 . Ensure that all designs comply with automotive industry standards and regulations, such as ISO 26262 and Automotive SPICE.

1. Develop high speed interface subsystem architecture and integrate PCIe, MIPI, or DisplayPort subsystem. 

2. Develop security and FuSa function on PCIe, MIPI, or DisplayPor degital circuit.

解讀客戶的網絡安全需求 

從網絡安全需求中推導出功能和安全概念 

制定和審查安全系統架構 

與 IP 團隊和客戶溝通和協調安全設計 

執行系統安全分析（例如：TARA）

1. Interpret customers’ functional safety requirements 

2. Derive functional and technical safety concepts from functional safety requirements 

3. Develop and review the safety IP design 

4. Communicate and coordinate safety designs with IP teams 

5. Perform system safety analysis (ex: FMEDA)

1. Interpret customers’ functional safety requirements into SoC requirements 

2. Define the SoC level architectures to meet functional safety requirements 

3. Communicate and coordinate safety designs with cross-function IP teams 

4. Perform system safety analysis (ex: FMEDA)

1.數位電路設計  

2.多媒體架構與電路設計  

3.多媒體系統整合 

1.Digital IC Design 

2.Multimedia Architecture and Design 

3.Multimedia System Integration

Wi-Fi架構和數位電路設計 

整個晶片的時鐘、測試和重置規劃 

低功耗數位設計 

從RTL到閘級的SoC晶片整合，包括時序收斂和可測試性 

設計方法和整合流程改進

1. Processor core, cache and peripheral verification 

2. Verification flow and methodology 

3. Advanced tool and verification technology survey

1. Serdes/High speed interface related PHYD IP architecture planning. 

2. Serdes/High speed interface related PHYD IP RTL coding.  

3. Serdes/High speed interface related PHYD IP front-end and back-end integration.  

4. Co-work with MAC design team and DV team for IP verification.  

5. Co-work with Analog design team for PHY co-simulation.

1. 在AI產品上負責Memory IP上相關開發、熟悉軟/韌體、除錯、優化及測試等工作項目。 

2. 負責IP SDK 與診斷程式開發。 

3. 協同團隊共同完成系統雛型建立、驗證及性能優化與調適。 

4. 達成客戶端產品導入，並支援產品量產工作。

1. 藍芽/802.15.4 通訊協定軟體、驅動程式、測試工具開發與驗證 

2. 藍芽/802.15.4 客戶專案功能開發與支持

• Linux/Android 系統軟體的設計、開發、整合、測試、除錯、交付及維護。 

• Linux/Android BSP (Board Support Package) 的訂製、開發、整合、測試、除錯、交付及維護。 

• 將Linux/Android移植到不同的硬體平台(FPGA, real chip, …)及bring up。 

• 識別、分析及解決系統問題。 

• 進行系統效能分析、優化系統效能與資源配置。 

• 軟體開發相關文件的建立。 

• 與世界各地進行跨部門及跨公司的合作。

1. 撰寫或移植裝置驅動程式 

2. 撰寫硬體模組測試程式 

3. 進行硬體模組測試及驗証 

4. 分析系統問題 

5. 分析及改善系統功粍效能

Requirements Elicitation, Requirements Analysis, and Architectural Design 

- Analyze product requirements from customer 

- Discuss the expectations and requests with customer 

- Agree or reject the requirements 

- Make architectural design proposals

1.參與 Linux 芯片移植，系統相關開發，調整和測試。 

2.解決Linux 系統穩定性和性能問題。 

3.與3rd party MW 合作 Linux 系統整合。 

4.協助其他團隊解決 Linux 系統層相關問題。 

5.客戶支持.

對於DFT晶片測試有興趣者，特別是 Automotive low DPPM DFT 以及 RISC-V DFT 領域， 

負責開發與實行DFT流程，以降低測試成本、提高產品品質為目的 

As a member of DFT engineering team, the candidate will develop methodologies and implement DFT for pre/post-silicon DFT flow and contribute to Automotive/RISC-V product test quality. 

Work with senior engineers across disciplines (DE, IMP, PE, TE) to meet low cost and high quality testing

1. DFT architecture exploration & evaluation for next-gen process node & package technology of MediaTek: 

* Scan chain insertion & ATPG pattern generation 

* Pattern validation through simulation & silicon analysis(pass/fail, shmoo, fail log, etc.) 

* Diagnosis to help manufacture process improvement 

2. Co-work with SoC architect, RTL designer, physical design engineer, and package engineer to define best architecture for 3D-IC: 

* PPA(Performance/Power/Area) impact analysis & mitigation via DFT innovation 

* Develop & integrate DFT-related RTL design modules to test chip

1. ARM Mali GPU 性能, 功耗優化與穩定性相關問題解決 

2. Linux kernel driver and microprocessor firmware 開發, spec reading. 

3. Android系統, 圖形知識, 及相關的driver 程式開發