Ethernet數位IC設計工程師C1

Joining in specification definition, designing verification platform, developing behavioral models, and responsible for system and functional verification

Verification for microprocessor designs. Desired skills and experience includes: 

1. Experience in processor design verification: test planning, testbench development, and documentation 

2. Knowledge of assembly language, C/C++ and/or SystemVerilog 

3. Knowledge of SVA or UVM methodology for block and top level verification 

4. Formal property checking/formal verification methodologies 

5. Proficiency in scripting languages such as Python/Perl 

應徵條件： 

1. 碩士以上; 電子、電機、資工、電信、電控、資科等相關科系畢業為主。 

2. 具相關工作經驗者尤佳。

大學以上，電機、資訊相關系所畢，具下列任一條件者佳： 

(1)熟C、C++、Assembly、Linux。 

(2)具網路embedded system開發經驗。 

(3)對網路如Ethernet, TCP/IP, NAT, QoS, Network processor/protocols/Architecture有興趣者。 

(4)對網路產品，程式設計有興趣者。

DRAM Circuits Design