【DQE】I-Mini-Line工程師

Server & Storage Power validation:  

1. CPU Validation 

2. DDR5 Validation 

3. POL Validation 

4. E-fuse Validation 

5. System power consumption testing 

6. BMC fault log testing

CESBG 產品線: Server產品 

1.技術可行性分析  

2.硬體線路設計  

3.硬體設計審查和BOM產出  

4.審查 PCB Layout  

5.執行開機測試和執行除錯

產品線: Server產品 

1.Familiarity with VHDL/Verilog coding and FPGA/CPLD design flow is a must 

2.Familiarity with Lattice/Altera/Xilinx EDA design tool. 

3.Familiarity with FPGA/CPLD design in server application and multiple bus protocols including I2C / power sequence / SPI / LPC / SGPIO / I2C switch/ UART / PWM / eSPI 

4.Strong HW and x86 architecture knowledge is a plus. 

5.Fluent English written and verbal communication skills. 

6.Integration and test experience 

7. Highly self-motivated, able to work independently in a lab environment.

[1] 與客戶合作，定義新產品測試工站的測試需求（測試項目+測試環境） 

[2] 負責對機構設計/電子設計/軟件測試等團隊資源進行整合，進而完成工站軟硬件開發目標 

[3] 負責工站架設、軟體驗證、治具驗證、治具維護、產線測試異常分析，確保新產品試產各個階段的順利進行 

[4] 負責工程階段工站到量產的順利交接，主要包括：良率、重測率和UPH等達標

1. 車載產品(IVI, Cluster, Telltale)零件選用、成本評估、電路設計。 

2. PCB layout規劃及review。 

3. 產品訊號量測、硬體電路除錯、問題分析與驗證。 

4. 產品工程文件撰寫與維護(ECN、BOM，DFMEA...)，需工作細心，態度積極負責。 

5. 協同軟體、機構工程師、QA…等相關單位進行產品開發驗證。 

6. 熟悉CAN Bus相關協定以及應用者佳。 

7. 了解車用認證/法規測試要求(ISO26262)。 

8. 有車用產品設計經驗者佳，無經驗亦可，歡迎對車用電子有興趣的人員加入。

Responsible for developing smart phone tester and validating the tester system in factory to support a new product introduction from PROTO to MP stage. This includes:  

1. Working closely with CM development and design teams early in the product development life cycle. Specifying new feature test coverage/test requirement specification definition 

2. Responsible for station online bring up, including tester set up, test SW/HW validation, calibration & stress test. 

3. Responsible for analyzing test exception and tester online maintenance 

4. Improve station stability to hit MP target

1.工程師職缺: 

a. 負責x86-64伺服器操作測試，涵蓋的有: 測試與驗證系統功能(functional test)、相容性(options compatibility test)、效能(performance)、壓力承載(stress loading)、可靠度(RAS feature test)以及整合測試BIOS、BMC、與伺服器硬體所有配件 

b. 對發現的產品Defect能有初步的分析與Isolation test去收斂問題點 

c. 填寫並描述專案上發現的issue至Tracking system 

d. 基本溝通技巧和有邏輯/逆向思維 , 譬如能舉一反三或是反向思考 

2. 有Intel and AMD x86或ARM伺服器或x86 storage server, networking switch等硬體類產品經驗者尤佳 

3. 有伺服器當中主機板的研發與測試過程，具備問題診斷偵錯能力且對Defect敏感經驗者尤佳 

*畢業新生擁有電腦硬體裝修軟體應用證照亦可，1年以上電腦系統整合測試工程師經驗尤佳

1.測試環境架設2.測試問題除錯3.測試報表收集與分析4.信號量測5.辦公室/實驗室事務處理

1. 負責Server / Storage 產品的電源開發設計 

2. 可承接並獨立完成客戶新機種開發 

3. 掌握設計成本並可與客戶討論產品規格 

4. 協助工程問題與解決對策

1. Design, develop, and maintain test automation codebase such as Python/Bash/Powershell scripts 

2. Experience in manual/automation testing of server centric/rack-level validation 

3. Extensive communication and collaboration with stakeholders from firmware/BIOS/BMC/Silicon-Vendor teams for planning and developing solutions.

主要負責： 

Network main board power design, the desing technology on the Buck converter and flybcak converter and forwod converter in switch main board 

1. 設計交換機產品開發階段的電源規劃與設計 

2. 設計架構為多項降壓式/反馳式和順向式轉換器設計 

3. 產品開發階段的電源驗證與除錯 

4. 產品開發階段的bring up 

5. 協助HW解決系統問題關於電源設計方面 

6. 協助客戶提供相關的電源設計建議與討論

CESBG-產品線Server  

1.工程師職缺: 

a. 負責x86-64伺服器操作測試，涵蓋的有: 測試與驗證系統功能(functional test)、相容性(options compatibility test)、效能(performance)、壓力承載(stress loading)、可靠度(RAS feature test)以及整合測試BIOS、BMC、與伺服器硬體所有配件 

b. 對發現的產品Defect能有初步的分析與Isolation test去收斂問題點 

c. 填寫並描述專案上發現的issue至Tracking system 

d. 基本溝通技巧和有邏輯/逆向思維 , 譬如能舉一反三或是反向思考 

2. 有Intel and AMD x86或ARM伺服器或x86 storage server, networking switch等硬體類產品經驗者尤佳 

3. 有伺服器當中主機板的研發與測試過程，具備問題診斷偵錯能力且對Defect敏感經驗者尤佳 

*. 畢業新生擁有電腦硬體裝修軟體應用證照亦可，1年以上電腦系統整合測試工程師經驗尤佳

伺服器產品PSU規格品選用,客製品協同開發,系統/單體驗證,除錯 

具有Server PSU 3~5年設計經驗 

熟悉AC/DC PSU架構特性 

熟悉PSU驗證操作流程 

知悉電源PSU生產流程

1. 負責帶領團隊規劃與建置Layer 2 Ethernet Switch系統整合測試 

2. 測試人力分配、測試涵蓋度與測試時程規劃與掌控 

3. 規劃建立自動化測試及改善研發驗證流程  

4. 團隊測試技術提升與規劃 

5. 跨部門溝通與協調

〝1. Layer 2/ 3 Switch 網路系統功能整合測試  

2. 規劃撰寫/編修測試計畫與測試架構  

3. Switch自動化測試與架構開發  

4. 測試驗證系統效能、壓力測試  

5. 建立測試環境與維護、改善測試程式與方法 〝

Server, storage產品之DC-DC 電路設計, layout / placement review, 除錯, 驗證

1. 負責Server / Storage 產品的電源開發設計 

2. 可承接並獨立完成客戶新機種開發 

3. 掌握設計成本並可與客戶討論產品規格 

4. 協助工程問題與解決對策

We are seeking an experienced system debug engineer with strong background in the cloud/datacenter domain. In this position, you will play a key role in realizing vision to work closely with Foxconn’s biggest customers: CSPs to enable and scale out Foxconn latest server platforms and technologies. This position will have a chance to touch cutting-edge silicon, server hardware technologies and emerging firmware and OS solutions, and apply them to the CSPs.  

Responsibilities include:  

• Mastering the latest Intel/AMD/Ampere hardware and platform features. Tracking the enabling status of those features in silicon, low-level firmware/software, Operating System and latest Linux Upstream Kernel. 

• Debug customer data-center issues related to platform enabling and customization. Deep dive and root cause silicon enabling and system integration issues to sub system or source code level. 

• Closely collaborate with silicon enabling, firmware development, and various component teams from third-party vendors (e.g., memory, storage, network, power and performance, thermal/mechanical, I/O, etc.) to troubleshoot and debug cross-discipline and complex integration issues on server platforms. Drive debug taskforce cross functions to ensure timely issue resolution. 

• Contribute to the definition of new platforms with software architecture and development teams, support platform bring-up activities, review designs and code changes 

• Contribute to validation team on improving test plan/method to validate features and verify fixes 

• Put new technology into practice in the fastest manner, explore all possible alternatives for better solution, and pursue constant improvement on debug methodology and tool 

• Define and drive the system debug process implementation and ingredient owner engagement and alignment 

Qualifications: 

The candidate should possess a Bachelor of Science in Electrical Engineering, Computer Science or relevant technology (advanced degree is preferred) with 5+ years of applicable industrial experience in the following:  

• Solid understanding of x86/IA with design experience or working knowledge on CPU, DIMM, Chipset and Platform 

• Strong low-level debugging skills that enable the root causing of issues across hardware, firmware and OS levels 

• Experience with ASSET SCANWORKS, Intel ITP and Cscript development. Experience with PythonSV or programming with Python. In-depth knowledge of CPU flows and experience on silicon level debug and ASD (e.g. CrashDump Analysis) are preferred 

• Solid understanding and hands-on development/validation experience of popular server/PC technologies including PCI/PCI-E, USB, SAS/SATA, i2C/SMBUS, IPMI, BIOS/EFI and DIMM, Storage, Networking, Virtualization, Manageability, Security, RAS, etc. 

• Understanding of Operating System, Driver, BIOS and firmware fundamentals. Programming skills (e.g. C/C++) that enable the source code level debug and issue fix is highly preferred. 

• Experience at model-based problem solving that enable the effective investigation and narrow-down of complex issues; 

• Demonstrated capability to work within a team environment facing fast-changing requirements and complicated stakeholders.

1.數位邏輯設計並熟悉RTL Coding架構。 

2.熟悉 Xilinx、Altera FPGA 架構與設計。 

3.研發設計網通應用IP。 

4.協助開發與驗證FPGA電路(Schematic)。

1. 負責雲端Server的專案工作 

2. 與一線大廠合作機會 

任何都會更新在粉絲專頁上喔！粉絲專頁如下↓↓ 

粉絲專頁：https://www.facebook.com/鴻海集團-鴻佰科技實習生新幹班專案-109654178264949 

• 鴻海集團 Fii 雲運算產品事業群提供有志朝產業發展的同學實習之工作機會。 

• 同學將與專業團隊一起工作學習，以得到更多將理論應用到實際工作的機會！ 

• 計畫介紹： 

• 職缺內容： 新幹班 (大學四年級或碩士二年級畢業生) 

• 應徵時間：即日起至2024/4/26(五) 

• 報到日 ：2024/6~ (依學生時程狀況調整) 

※若有個人中英文履歷，歡迎與應徵申請一起寄出 

實習生/新幹班職缺表: https://lnkd.in/g5SNPyxR 

投遞履歷表時, 煩請同時回覆 

1.申請表格  

https://docs.google.com/document/d/1ifPNL70V77wvSGYWXHV57Ftq3sxhmyK3/edit 

2.有興趣職缺類型或編號